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Low Spurious High-speed Jump Frequently Comprehensive Design Of The S-band

Posted on:2008-05-12Degree:MasterType:Thesis
Country:ChinaCandidate:J LvFull Text:PDF
GTID:2208360212499695Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
A sort of S-band frequency synthesizer with wide bandwidth low phase noise and spurious free dynamic range (SFDR) has been introduced. By adopting the hybrid"outside loop frequency mixing solution with DDS/PLL system"frequency synthetic technology controlled by MCU, through optimizing the program algorithm and considering rationally for the Electromagnetic Compatibility (EMC), the performance of the system has been achieved.Firstly the basic theory of DDS and PLL, as well as their characteristics and phase noise properties have been analyzed detailedly. Then analyzing and comparing the advantage and disadvantage of several frequency synthetic technologies which are how to expand the output bandwidth, the paper adopt the scheme of outside loop frequency mixing solution with DDS/PLL system to do. In this scheme the part of DDS and PLL are two individuals and all controlled by MCU. Their output frequencies are mixed by a mixer. And the output frequency of DDS is transformed to higher output frequency. Therefore it is good to not only enhance the output frequency of DDS and output frequency , it also makes the higher hopping speed.Secondly a fully analysis and verification work on this solution has been done.It focuses on two aspects.1. The feasibility analysis on key system spec (like phase noise,spur,bandwidth, frequency hopping time…etc) has been done before hand frequency arrangement which bases on experiment result has been decided to pick up the working band which has the most pure spectrum. Then band select filter has been used to suppress the spur after 4 time frequency multiplier. In addition an outside loop frequency mixing solution with DDS/PLL system has been chosen in this paper, and the high speed microwave switch has been chosen as well to achieve fast frequency hopping .2. The detail design description about each sub part of this system has been given in this paper. Two different loop filter approach (simple gain approach and feedback approach) have been compared to achieve better phase noise. Both approach's theoretical analysis and measurement result has been put in this paper. Also the simulation work on some key filter in different band has been done by combining the software ADS and HFSS.Finally the debugging process has been introduced and the result has been analyzed detailedly.The specifications show as following: output frequency range 2.25~2.75GHz, phase noise -80dBc/Hz@10kHz, SFDR -65dBc, harmonic restrain -30dBc, hopping time 150ns, step 2.5MHz. So the feasibilities have been verified.
Keywords/Search Tags:DDS, PLL, phase noise, SFDR, frequency hopping, frequency synthesizer
PDF Full Text Request
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