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X-band Broadband Frequency Comprehensive Source Of Research

Posted on:2006-01-28Degree:MasterType:Thesis
Country:ChinaCandidate:X Y ZhengFull Text:PDF
GTID:2208360152997343Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
A sort of X-band frequency synthesizer with high resolution, wide bandwidth, low phase noise and spurious free dynamic range (SFDR) has been introduced. By adopting the hybrid "DDS+PLL+frequency doubling"frequency synthetic technology controlled by MCU, through optimizing the program algorithm and considering rationally for the Electromagnetic Compatibility(EMC),the performance of the system has been achieved. Firstly the basic theory of DDS and PLL, as well as their characteristics and phase noise properties has been analyzed detailedly. By taking advantage of the low phase noise properties of DDS and the narrow-band filter properties of PLL, with the consideration of the target of the system, the S-band frequency synthesizer based on DDS-PLL has been devised. Then two ×2 frequency multipliers make the output frequency expand to X-band. Secondly the scheme has been demonstrated roundly. Then the power performance has been designed reasonably, and the feasibility about the phase noise, SFDR, hopping step, bandwidth, has been analyzed. According to the request of the system, the DDS chip AD9852, the PLL chip ADF4113, the VCO ROS-3000V and so on, have been chosen to establish the system circuit. In this system, MCU PIC16F877A has been used for the implement of frequency hopping (FH) and the input of the frequency control words (FCW) under the software of MPLAB IDE. For several filters of different bands which are key to the system, the simulation and design have been done by combining the theoretical method with the software ADS and HFSS. Finally through the EMC design of the layout and grounding, the request has been achieved by debugging all the whole circuits and programs time after time. Its specifications show as following: output frequency range 10~12GHz, phase noise -67dBc/Hz@10kHz, SFDR -60dBc, harmonic restrain -35dBc, step 1MHz, hopping time 19us. So the feasibility has been verified.
Keywords/Search Tags:DDS, PLL, phase noise, SFDR, frequency hopping, frequency synthesizer
PDF Full Text Request
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