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Sparc Architecture And Real-time Kernel Transplantation

Posted on:2007-03-17Degree:MasterType:Thesis
Country:ChinaCandidate:L FengFull Text:PDF
GTID:2208360185496385Subject:Communication and Information System
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SPARC is a CPU instruction set architecture(ISA),which was designed as a target for optimizing compilers and easily pipelined hardware implementations.SPARC implementations provide exceptionally high execution rates and short time-to-market development schedules.SPARC,formulated at Sun Microsystems in 1987,is based on the RISCI&II designs engineered at the University of California at Berkeley from 1980 through 1982.The SPARC "register window" architecture,pioneered in UC Berkeley designs allows for straightforward, high-performance compilers and a significant reduction in memory load/store instruction over other RISCs,particularly for large application programs.There are many advantages to use RTOS in developing and embed software.First,RTOS adopts multi-tasks mode,instead of single-task mode we used before,so that the software can be more reliable.Second,the programmer can call lots of OS services,Hke semaphore,mailbox,and so on,which are provided by RTOS .Therefor the developer can focus on how to implement the application software.It's not necessary to know internal kernel of the RTOS.The use of a RTOS simplifies the design process by splitting the application code into short time.Third,it can meet the real-time requirement of the system.With a preemptive RTOS,all time-critical events are handled as quickly and as efficiently as possible.The paper consists of six chapters.Chapter 1 give a summary of development of RTOS and several different kinds of RTOS kernel such as RTEMS,uC/OS-II and eCos.Chapter 2 introduce the basic theory like muti-task,dispater in uC/OS-IIand some fundatmental concepts of embed system.SPARC architecture and register-window concepts are discussed in chapter 3 as well as the instruction sets used in TSC695.Chapter4 give a particular explaination on the porting of uC/OS-II to SPARC architecture,there implements several basic functions such as Highready,OSCtxSw and OSIntSw.In chapter 5,the interrupt of MIL-STD-1553B and initialization of BU-61580 are provided to achieve the space-borne SAR control center system.Finally,a summary of the whole paper is given in chapter6.
Keywords/Search Tags:RTOS, register-window, interrupt
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