Based Disk Array Radar Echo Simulator Developed

Radar system simulation,which can generate simulative radar echo signal to test the function of Signal Processing Equipment, is used as an important method in the design & verification of modern radar system. This thesis discusses mainly about the hardware design and development of a simulator based on RAID,which is composed of IDE harddisks. Those harddisks are used to save exceedingly long period wave data due to their huge storage capability. The broadband signal is generated by high speed D/A, and the logical control of the system such as the interface timing control of IDE or SDRAM is implemented by FPGAS. One key points of the system design is reading harddisks at the speed of 40MByte/S, and for this goal, SDRAM pingpong operation is used. Another key point is putting four 40MByte/S data stream into one160MByte/S data stream.In the first chapter of the thesis, the background of the radar echo simulator is introduced, including the application , basic theory and technology of the radar echo simulator. The development of the radar echo simulator in the world is introduced, as well as the worldwide usage of the radar echo simulator. The author task is also introduced.In the second chapter, DDWS basic theory, the simulator design theory are introduced. The mathematic models of sampling and reconstruction are analysed respectively, and an important conclusion is got, that oversampling can decrease high frequence distortion of D/A output signal and the difficulty of designing lowpass filter. As a result the signal quality is improved.In the third chapter, the hardware design of the radar echo simulator is introduced, including the unitary chart of hardware structure and design of each part in this system, which is composed of designs of computer interface, controlling SDRAM and controlling IDE harddisks and some introduction about D/A and FPGAs used in this system.In the fourth chapter, the FPGA software design of the radar echo simulator is...