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Dragon C2 Processor Cache Unit

Posted on:2007-06-03Degree:MasterType:Thesis
Country:ChinaCandidate:X P JiangFull Text:PDF
GTID:2208360182478766Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
The achievement of the processor results from two aspects: Computer Architecture and manufacturing technology. However, the memory speed has fallen far behind due to its structure limit. So the memory sub-system becomes more and more important. The cache technology is one of the valid methods to solve this problem.Based on the National Defense Preliminary Research Projects, the author has taken part in the research of 32bit CISC microprocessors "LongTeng"-C2, which is compatible to Intel 486-DX4 in Instruction Set Architecture (ISA) and the interface timing.This paper discusses the design, implementation and verification of cache Unit in the "LongTeng"-C2 Processor.The research work of this dissertation mainly includes:1. Study the processor of Intel486D4, design and implement the cache unit of the processor "LongTeng"-C2.2. Study the design technology of cache;propose the counting technology of the full address-trace based on the Simics platform and the counting technology of the cache hit based on the crossed-list which is independent of the number of cache-way and cache size.3. Study the implement technology of memory in the cache;implement the memory in the on-chip cache.4. According to the synthesis and verification requirement, finish the synthesis and verification of the cache unit in the processor "LongTeng"-C2.
Keywords/Search Tags:on-chip cache, full address-trace, Simics platform, cross-list histogram
PDF Full Text Request
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