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Ic Manufacturing Process And Lithography At The Characteristic Relations

Posted on:2006-07-14Degree:MasterType:Thesis
Country:ChinaCandidate:W L MaFull Text:PDF
GTID:2208360152497349Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
It is studied the relation of integrate circuit manufacture process and lithography alignment in this paper. Some key factors, such as alignment masker, process layer and isolation technology are analyzed. The ways of improving the alignment accuracy of photolithography are introduced. The alignment is one of the most important specifications of the stepper. Firstly, The dark alignment that is applied to auto alignment technology is discussed, and the alignment strategy and alignment technology of NSR series produced by Nikon are discussed, too. The basic alignment theory has been explained particularly. Alignment on varies of lithographic layers and affection of lithographic layers on alignment signal are analyzed principally. The overlay accuracy of varies lithographic layers are examined by experiment, so the order of alignment capabilities is confirmed. Secondly, the work is to inestigate the efect of the surface reflectivity of the Al coated wafer on the alignment precision during multi-step lithogrphy process. In the experiments, different surface reflectivities of the Al coated wafer were obtained by changing the thickness of the overlayer photoresist. It was found that the thickness of the photoresis can significantly reduce the surface reflective effect of the Al coated wafer, and therefore improve the alignment precision of lithogrphy process. Lastly, an overlay error model of stepper is introduce. This model can be used to estimate overlay accuracy of a stepper and overlay matching of mutiply wafer steppers.
Keywords/Search Tags:Lithography alignment, process layer, integrate circuit, isolation, Wafer stepper, overlay, overlay error
PDF Full Text Request
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