Research On Application Of Overlay Optimization Method In Deep Submicron Lithography Process

The Lithography Process as the core technical of the semi-conductor manufacturing, is the drive of the whole IC manufacturing technique to develop forward. Along with IC industry entering 22nm node ages, the shrinking continuously of the device size puts forward a very high request to the photo overlay. For the key layer of some products, 2-3 nm overlay shift will cause the chip function descend directly even expired. Therefore, improving overlay performance, is one of the important topics of the study of Lithography Process.This thesis, from the overlay principle and product application, combined with the actual test data, clarified the influence of overlay to the yield rate of the product, but also reflected the urgency of overlay optimization needs. Then, through the method of fishbone analysis, analyzed various factors influencing the photo overlay, refining the overlay accuracy and stability can be obtained in two directions, namely controlling equipment stability and improving overlay compensation. Finally, we carried out the practice application evaluation for the overlay grid map method and overlay baseline control method respectively. Two kinds of optimization methods in practice, reflected a good optimization effect, overlay performance optimization were over 10%.Through the research of Deep Submicron lithography Process, We found out improvement method of photo overlay process, and obtained expect result after the fulfillment. It provided the experience for the development of future lithography process.