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High OIP3 Down-conversion Mixer Based On CMOS Process

Posted on:2022-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:J ZhouFull Text:PDF
GTID:2518306764468704Subject:Physics
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Since the 21st century,wireless communication system has penetrated into all aspects of people's life,as a key part of the wireless communication system,RF transceiver system have been widely used in civil,military and medical industries.At the same time,as wireless communication technology develops,the integration of RF transceiver system and other performance indicators have put forward more stringent requirements,which requires the design of each circuit module of RF transceiver system to improve.Essentially,RF transceiver system is a function to complete a frequency conversion.The receiver converts the received high-frequency signal into a low-frequency signal and then transmits it to the post-stage circuit for processing;the transmitter converts the received low-frequency signal into a high-frequency signal and then transmits it through the antenna.Up-conversion and down-conversion of these two steps in the transceiver system can not be omitted,so the design of high-performance mixer is vital.In this thesis,two down-converting mixers are designed based on CMOS process.One is a passive mixer structure,which includes three main parts:mixer core circuit,fundamental buffer and output buffer.The RF signal is input directly from the source of the switching tube,mixed and filtered with the local oscillator buffer,and outputted after amplification of the output buffer.The core circuit of the passive mixer structure ensures its linearity;the fundamental buffer amplifies the fundamental signal to approximate a square wave,which not only reduces the requirement of the fundamental power,but also improves the linearity,noise,gain and other performance;the output buffer serves to amplify the IF signal.Another design is with an active mixer structure,which consists of four main parts:mixer core circuit,cross-conductor stage circuit,output buffer,and reference current source.The RF signal is amplified by the cross-conductor stage circuit,mixed with the local oscillator signal in the core circuit of the mixer,and finally outputted through the output buffer.The cross-conductor stage circuit utilize current multiplexing technology and cross-conductor enhancement technology to improve the gain at the front stage,which in turn improves the noise performance,and also make use of the derivative superposition technology to improve the linearity of the mixer;the reference current source provides bias current to the circuit,which improves the PVT characteristics of the mixer.The passive mixer chip area is 0.94*0.46 mm~2,the RF input signal frequency is 1.8-2.5 GHz,the local oscillation power is 0 d Bm,and the output IF signal frequency is 70-200 MHz.The final test results at a supply voltage of 1.2 V are:the frequency gain is greater than 18 d B,the noise figure is less than 14.5 d B,and the OIP3 is about 17.8 d Bm.Under the same operating conditions,the post-simulation results of the active mixer are:the frequency gain is greater than 19 d B,the noise figure is less than 10.3 d B,and the OIP3 is about 14 dBm.Both mixers have basically met the design specifications.
Keywords/Search Tags:CMOS, Passive Mixer, Active Mixer, OIP3, PVT
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