Eight Embedded Risc Mcu Ip Core Design

With the rapid development of the Information Technology, SOC has become the development trend of IC design. And the methodology based on the IP duplicate technology, which can improve the design efficiency at a large degree and decrease the cost, is becoming the chief methodology of SOC design gradually. The subject of this thesis-An eight bit embedded RISC Microcontroller Unit IP Core design is just a helpful try and practice with this methodology.This paper gives complete analysis for the system architecture instruction set and system time sequence of PIC16C6X one-chip computer. Based on the analysis, the RISC MCU IP soft core's top function definition and structure partition are finished in this thesis. A effective RISC MCU IP core model has been set up.In this paper, using a top-down design scheme, the RISC MCU IP core is divided into two parts: data path and control path. All the modules in the two parts are described by Verilog HDL, a kind of hardware description language. The simulation and synthesis of the whole work are finished successfully with EDA tools.