Reed-solomon Code, Codec, And Simulation

In modern communication, RS code has turned into standard error correcting and coding unit as outer code, and become widely used. In DVB-C standards that are applied to CATV, RS (204,188) code that can rectify eight errors within block is adopted, and meanwhile in GA's 8-VSB modulating standards of digital high articulation, RS (208,188) code that can rectify ten errors is adopted. However, in actual channels, RS code need be applied in combination with interleaving and scrambling in most cases to deal with sudden errors that break out continuously. Due to intellectual asset in the form of copyright and/or patent, there are no available RS coding and decoding modules for calling for in scientific research exploitation. Furthermore, the configuration and algorithm are rather complicated. It is demanding to fulfill this part of module unit based on FPGA and to form the kernel for calling for.The paper expounds on the theory, concept and application of Reed-Solomon code by the brief introduction of error controlling system and channel coding, and finally finishes the design of RS code coder and decoder under the guidance of DVB-C standards by consulting the related references. In the paper, the author analyzes the key techniques of the design scheme in great detail and expounds on them, mainly inclusive of two sections, i.e., the theory of design concerning RS code coder and hardware configuration. Then the author ends the paper with an example to verify the correctness of the holistic design.The main content of the paper has undergone the full simulational verification both on algorithm and hardware configuration. The results verify that the design of the paper is a complete and feasible one.