Low-voltage Low-power Cmos Op Amp Design

Because integrated degree's exaltation and portable electronic application's development , low-voltage and low-power technique is more and more important. However, to the design of analog circuit, it is a challenge when its supply voltage is low o Now the typical supply voltage of analog circuit is about 2.5-3 v , but the trend suggests it will be 1.5 v, even much lower .Under this condition, great effort of research members domestic and abroad is devoted to the design of low-voltage circuit structure with standard CMOS processesIn the analog IC, one of the typical circuits is operational amplifier, and many analog circuits can use it.. Therefore, the design of low-voltage and low-power operational amplifier is particularly important. While realizing low-voltage and low-power, it must be noticed for the implementing of the main function of the circuit. Because the low supply voltage affects performances of circuits, it obviously is mistake for just implementing low-voltage and low power but not implementing the good performances.While low voltage and low power is realized when designing the operational amplifier in this text, great efforts have been devoted to increasing the input common mode range and the swing of output signal, and lowing the output resistance at the same time. For this, I adopt the new differential input stage to make input common mode range enlarged, and as far as possible not reduce its gain. During the exaltation of output signal swing, the adoption of the resistance connecting across can reduce the output resistance. When analysing output stage, I try using the miler theorem to analyse it, so quantitative analysis can be deduced and understood easily. In order to insure the correctness of analysis of miler theorem, I use simulation to verify and simulative result shows the analysis is correct...