.64-bit Risc Cpu Features Instruction Obtained

This paper details the flow fetching the instruction of 64-bit RISC CPU and ASIC design flow.Today, China had not been owned intellectual property of 32/64-bit CPU . And the high-performance CPU is very useful to our economy and military. Now, we are designing high-end microcomputer by means of international advanced IC design technology and manufacturing techniques.Electronic Design Automation is useful tool in VLSI integrated circuit field. EDA tools can design complex electronic system by hardware description language (HDL), simulate function, synthesize, place & route and verify sequence for the whole system. At last, EDA tools generate netlist for semiconductor manufactory. The EDA technology and Veriolog HDL must speed up the design of RISC CPU in china.The paper elaborates RISC technology characteristic and 5-stage pipeline architecture and function of the 64-bit RISC CPU, and dwells on 64-bit Vega CPU characteristic, and details the EDA technology and the main flow of ASIC design, and elaborates the operation and exception process of the Vega CPU and virtual instruction address' architecture and generation, and details Cache architecture and MMU. The master dissertation dwells on virtual address translating into physical address, instruction cache finding address and instruction fetching, too. At last, the paper involves the flow and related data of logic simulation, logic synthesis and test vector in the RISC CPU.