The Design And Realization Of MMU In 64bit High Performance CPU

The main function of a MMU is virtual address to physical address translation and address protection. This design is TLB (translation lookaside buffer) based using page addresses. It can perform 32bit and 64bit address translation and has three operating modes: User mode, Supervisor mode and Kernel mode.The TLB is used to speed up the address translation process, there are many common used virtual and physical addresses stored in TLB. During address translation, the input virtual address is compared with all the virtual address stored in TLB, if there is a match, the corresponding physical address is selected as output and the address translation is done. If there is no match in TLB, an exception will occur and the operating system will look for the address mapping in the main memory and write the information back into TLB. Then the TLB does the comparison-again and outputs the physical address. Only the page numbers are stored in TLB because the virtual page size is the same as the physical page size. Only the page numbers are compared. The physical page number combines with the virtual address offset to form the physical address.Full custom design methodology was used in the schematic and layout design of the data path, to reduce the time delay, chip area, power consumption. For high performance chips, full custom design is essential.