Based On The Risc Architecture Of The Asip Design

IC's rapid development into sub-micro technology enables a system or a subsystem to be integrated into a chip, which is called system on chip (SOC).And ASIP (Application-Specific Instruction set processor) based on RISC core is the key to integrate other system.Traditional design methods is inefficient to modem system design. The new approach makes use of core-based design method to save development time and to reuse existing designs.This paper mainly focuses on the following three field: system structure , system HW/SW (Hardware/Software)partition .synthesis and verification. And presents a HW/SW co-design method based on IP (Intellectual Property) core. We use this method to design ASIP, and verify this Virtual Machine using instruction codes, AC-3 codes and TS (Transport Stream) flow.At last, we compile the design with SYNOPSYS Design Compiler in 0. 25Wn CMOS technology. The synthesis information about area, power and time shows that this method has the advantage of fitting special architecture into algorithms easily. Thus, use of Hl/SW co-design method can lead to raise the potential quality and shorten the development time of design.