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Wideband Digital If Receiver System

Posted on:2012-06-06Degree:MasterType:Thesis
Country:ChinaCandidate:Q WangFull Text:PDF
GTID:2208330332486659Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Entering the 21st century, mobile communication is developing rapidly, pushing the technique from the initial 3G to LTE (Long Term Evolution). LTE standard can support higher rate of transmission under 20MHz bandwidth signal. No matter how the communication develops, its technology is more and more closely to the software radio. The perfect receiver system is put the digital part closely to RF front-end, considering the limitations of digital-to-analog converters, it is still unable to realize such a RF digitalized receiver. Intermediate frequency digital receiver is coming into being under this background, also the research on technologies of digital intermediate frequency is never stand.This thesis focused on some key technologies of digital intermediate frequency receiving system, carrying out the following research work:Firstly, based on understanding the receiving system theory the digital down converting technology is studied, the stray improvement of NCO and the sampling decimation technology is discussed emphatically. Moreover, this thesis studies the digital down converting technology under the framework of double antennas, analyzing the operating process of time multiplexer. Through modeling and simulation baseband signal at 30.72MHz can be obtained.Secondly, analyzes some kinds of carrier synchronization methods, including orthogonal loop algorithm, phase detectors discrimination algorithm and frequency detectors discrimination algorithm, analyzes their performances. Base on these researches, the thesis made an improvement on joint frequency-phase carrier recovery algorithm. Through simulation, the demodulating loss between practical and theoretical circumstances is about 2 dB. Meanwhile, it can realize the frequency correction for 10% symbol rate offset. It is vital to ensure the reliable data transmission and improve the performance of the receiving system.Finally, in order to verify the feasibility of digital receiving technology researched in actual environment, complete the FPGA module building of digital receivier, including the parts of DDC and carrier recovery. On experimental flat, with QUARTUS and MATLAB, experimental data can be obtained. It mainly analyzed the spurious free dynamic range of NCO and the impact to receiving system performance made by main signal measured points. Through observing power spectrum density of baseband signal and constellation plot, the frequency offset is corrected. At the same time, this thesis analyzes the shortage of this research work, which points out the direction for the further work.
Keywords/Search Tags:digital down converter, decimation, carrier recovery, orthogonal loop, FPGA
PDF Full Text Request
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