Font Size: a A A

Research Of Low-power Router Structure In Network-on-chip

Posted on:2011-11-09Degree:MasterType:Thesis
Country:ChinaCandidate:C M ZhangFull Text:PDF
GTID:2198330332987369Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
The proposing of NoC (Network on Chip) based on the development of large-scale integrated circuits, routing algorithm and the Internet technology, on the same time, these software and hardware technology are also advanced Network-on-Chip, NoC has a very wide range of applications and the actual needs of the research.Router is the very important component of NoC to complete data reception and forwarding, Interconnection network performance depends primarily on the construction of the router. In this paper, carry out two kinds of master and slave IP core:The first one is proposing the router architecture that can connect a master-slave IP core after analysis and comparison of the existing on-chip network router structure.The traditional structures are based on the same only one IP core,in the same words,the information exchange and data communication of traditional structure are under the conditions of equilibrium, but there is a certain limit for practical applications in this ideal condition, in order to overcome this issue, we can connect master and slave IP cores to NoC router, which assumes a different IP core data traffic and its communication frequency is different.Another is proposing a low-power NoC routers structure connected four non-symmetric master-slave IP core after the analysis of non-reciprocal nature of IP cores, using optimization algorithms to improve the performance of NoC and reduce energy consumption.Using OPNET on the traditional and proposed router structure to simulate,the simulation results show that performance of the presented is superior better than the traditional.
Keywords/Search Tags:NoC, Network-on-Chip, Router architecture, Crossbar Buffer, Power
PDF Full Text Request
Related items