Font Size: a A A

Research On Buffer Allocation And Crossbar Scheduling Technology In NoC

Posted on:2013-06-23Degree:MasterType:Thesis
Country:ChinaCandidate:L L LiuFull Text:PDF
GTID:2248330395480547Subject:Military communications science
Abstract/Summary:PDF Full Text Request
Buffer allocation and crossbar scheduling are key technologies of microarchitecture designand hardware cost control for routers of NoC (Network-on-Chip). And they are main fatorswhich affect the network latency and throughput performances as well. At present, there are stillthree main problems in the prior literatures on buffer allocation and crossbar schedulingtechnologies. Firstly, self-similar properties were detected in network traffic of NoC, whereasstatic buffer allocation algorithms in existence could not adapt these traffic properties, whichresults in great network latency. Secondly, the buffer utilization efficiency of existing dynamicbuffer allocations is too low, moreover, the logic complexity of corresponding crossbarscheduling mechanisms is too high. Thirdly, by right of its huge advantage at the aspects of thehardware consumption and its feasibility, bufferless NoC has become an important researchdirection in the next generation of NoC design, but the deflection rate of existing bufferlessmechanisms is too large, which results in poor network latency and throughput performances inbufferless NoC.To solve these three problems above, this dissertation presents the key differences betweenthe traditional Ethernet and NoC, and analyzes the existing buffer allocation and crossbarscheduling technologies as well.Main work and contributions of this dissertation are outlined as follows:1. A self-similar queuing model of virtual channels is formulated, based on which a staticbuffer allocation algorithm was proposed. Each virtual channel is assumed to be a queuingsystem under the self-similar traffic, based on which a queuing model is formulated for it. In thealgorithm, the overflow probability of each virtual channel is first calculated through the queuingmodel. And then1flit buffer depth is added each time to virtual channels with the largestoverflow probability till the whole buffer size reaches the threshold. The simulation resultsindicate that, when compared with existing static algorithms, the proposed algorithm could attainlower average packet latency with the same buffer consumption, and could save12.5%of bufferconsumption with the same average packet latency.2. A dynamic buffer allocation and crossbar scheduling mechanism based on flit batching isproposed. In the mechanism, the input buffer is managed uniformly, flits are batched accordingto their flow directions and buffer space is dynamically allocated to batches, then a probabilisticarbitration algorithm based on batch sizes is introduced, and the scheduling process is completedthrough batch allocation and switch allocation. The theoretical analysis and simulation resultsboth indicate that the mechanism this dissertation proposes could attain better network latencyand throughput performances with less hardware consumption.3. A crossbar scheduling mechanism for bufferless NoC is proposed. In this mechanism, aloopback channel is configured at each inputport, so as to buffer the requests those failed in theport competing. In addition, a priority scheme based on deflection and loopback counts wasintroduced, which gave first priority to the requests with the largest deflection and loopbackcounts in the port selecting. And the corresponding scheduling algorithm is presented finally, in which the requests with the highest priority directly pass the switchs, and the remaining requestseither enter loopback channels or be deflected based on their loopback counts. The simulationresults indicate that: the proposed mechanism could improve the network performance with thesame harware or power consumption compared with existing bufferless NoC. And whencompared with basic buffered NoC, it got better network performance in light load and worse inhigh load, but could attain a considerable reduction in hardware and power consumption and aconsiderable increase in frequency.
Keywords/Search Tags:network-on-chip, buffer allocation, crossbar scheduling, self-similar queuingmodel, flit batching, probabilistic arbitration, bufferless, deflection rate
PDF Full Text Request
Related items