Fpga-based Chaotic Des Encryption Systems Design And Implementation

With the development of information technology and the prevalence of computer network, information security is a key problem. How to protect the security of information have not only military and government departments interested in, the enterprises and institutions also. Cryptogram is the effective and feasible approach to protect the information safety.The effective means to make sure that the Cryptogram information is not illegal to get, not to be tampered with or damaged. The feasibility means it required is acceptable.In consideration of the deficiency of traditional cryptology and the ceaseless improved ability of cryptanalysis, data encryption based on chaos has became a focus of research.As the representative of tradition block encryption algorithm, DES has a deadly weakness that is too small key space to prevent exhaust attacks. To aim at the problem that the key space of DES is too small to prevent exhaust attacks, an expanding key space method is proposed and a chaotic transformed DES algorithm is constructed. The expanding key space method is based on 3 principles of the Shannon's idea "one-time pad", "infinite key space" and a chaotic system, which can make up of a determinate random number generator.The FPGA has the characteristic of flexible system structure and logic unit, high integration and wide application. Especially, the FPGA can carry out the more large-scale circuit, programmable flexibly. When the engineers use the FPGA to design and develop the product, the time is short, the cost is low, the tool is advanced, the standard product don't need to test, the quality is steady and the product can be inspected on line. So, the FPGA is widely used to design and make product.Considering the specific structure of the FPGA, according to the top-to-bottom design method,the FPGA implementation of such chaotic transformed DES algorithm is presented using VHDL,fulfilling the software simulation and hardware debugging; The whole and module design is detailed discussed especially the design of data distributor and DES units; The system is enabled to be embedded in existing cryptographic equipments by adding an UART module.