Radiation-resistence Design And Test Of SRAM

The SRAM(static random access memory)as the main semiconductor memory family, is widely used in the control systems in all kinds of spacecrafts and satellites. Studies of radiation effects have been carried out for more than 20 years, and radiation effects test of chips on various types of on-orbit satellites and a variety of accelerators have been finished. In this paper,we design a radiation hardended SRAM,and a radiation effects test system is designed according to the familiar influence under different radiation effects.Main work in this paper include:1,Hardening mechenism of SRAM cells has been analysed, and a 1KB SRAM chip based on 0.18um CMOS commercial process has been designed and implemented, which is composed of TMR, HIT, DICE, and 10T cell.2,We summarizes the SRAM failure modes under the effect of radiation. Then we design a radiation effects test system that can be used under different radiation enviroments. The hardware and software of the radiation effects test system and related testing technology have been explained. Simulation of power-off protection circuit has been also detailed. The SRAM was tested by the radiation effect system.The IO and core operate normally at a current of 38.3mA and 10.0mA respectively. Verified using the system, read and write functions were all correct.3,Domestic radiation enviroments have been explained. Functional verification of SRAM is detailed. And the radiation effects testing flow and the necessary equipments are described. Results of SEL test under pluse laser have been given: the LET thresholds causing IO SEL and core SEL are 23.1MeV·cm~2/mgå'Œ4.2MeV·cm~2/mg.