Research And Analysis Of FPGA Technology Mapping Algorithm

As developing of information industry of our country, design of integrate circuit, which has our own knowledge property right, is become a groundwork task. FAPG is becoming more and more important role in the field of electronic design. But most of the FPGA chips which we need were imported from other countries. It is important to design FPGA chips which have our own property right.In this thesis, we focus on the research and analysis on technology mapping, which is the key to FPGA CAD flow, and the main points are as follows:1. The general delay model used in algorithms LUT-based FPGA delay optimal technology mapping is introduced in detail. Technologies of depth minimization, area minimization are introduced in detail.2. Following the objective to optimize, we focus on the research on the algorithms LUT-based FPGA of depth minimization and area minimization respectively. Give research and analysis on the decomposition technology used in DAG-MAP,network flow technology used in FLOWMAP, the maximum flow minimum cut and node-split technology used in Edge-Map. Comparing the experimental results, evaluating the algorithms on the time and the optimal objective.3. Research the DAG-MAP algorithm, which improved by dynamic labeling method, giving the idea to improve the FLOWMAP using dynamic labeling, and giving theoretical analysis of its feasibility.4. Defining the area flow used in IMAP and giving a pseudo-code implementation of the traverseback and traversefoward in IMAP.5. Study the based-ALM FPGA technology mapping algorithms and propose my own understanding of the extracting and combined technique.6. Analyzing the process of changing a circuit problem into SAT problem, focusing the SATMAP algorithms, which expand IMAP to a general technology mapping algorithm based-PLB directly.