The SoC Design And Research Of Drivers' Eye State Detection System

Eye state detection is a key technology of the driver fatigue detection, with which we can judge the driver fatigue's degree. With the continuous improvement of chip integration, the future of IC design which has entered the era of SoC(System On Chip) and IP-based design is becoming mainstream. SoPC(System on Programmable Chip) is an efficient and flexible solution which adopts Hardware/Software co-design to integrate all hardware IP core and software function modules into a single FPGA (Field-Programmable Gate Array).This article analyzes a variety of eye state identification algorithms and system implementations. After comparison and summary of proposed algorithms and systems, we present a reconfigurable system based on EHMM(Embedded Hidden Markov Model) algorithm. with in-depth understanding of the data stream of EHMM eyes state algorithm, the hardware is divided into three parts from the perspective of the entire system architecture planning. They are 2D-DCT feature vector extraction module, observation vector sequence of probability calculation module and Viterbi state identification module. The RTL-level design and verification of the three modules using the Verilog hardware description language is completed. At the same time, we analyze the occupancy of the resources and design rules of logic master-slave interfaces.The modules are integrated to the whole system through the avalon chip-interconnect bus. Combined with SOPC and embedded systems development technology,we build the eyes state recognition hardware platform based on Nios II embedded processor.Finally, we have implemented and tested all modules on the Stratix? II EP2S60 platform of Altera. Results indicate that the eyes state detection is very accurate and performance has also been greatly improved.