Design Of Zero-if Ultra Wideband Receiver For UWB System

UWB is an emerging wireless technology capable of high data rate transmission over a wide spectrum of frequency band with very low power. The US Federal Communications Commission (FCC) approved of UWB for commercial use in February 2002. The UWB technology has a number of excellent features, and is a very competitive short-range wireless transmission technology.As the core block of UWB system , the RF receiver is has been paid much more attentions. This paper is emphasis on the design and realization of a low power lower noise and high linearity Zero-IF receiver. Beginning with the UWB wireless communication protocol and adopting the"Top-Down"design methodology, this paper discussed the noise and linearity of the receiver detailedly and then divided the system performances to each sub-block parameters of the RF receiver. In order to get rid of DC-offset problem, DC-loop feedback of VGA method is used which can move large On-chip AC-coupled capacitors to Off-chip , so the method can save much chip area. This design is fabricated in SMIC 0.18um RF CMOS process, and measured by Chip-on-board Method on PCB. The Measurement results shows the receiver can achieve a maximum gain of 47.6dB across 3~5GHz.The minimum detected signal is -70dBm, and the input match is better than -8dB. The power consumption of the whole receiver is 50mW, and the Zero-IF receiver has been successfully used in UWB system which can transmit high-definition video smoothly.As the main blocks of Zero-IF receiver system, this paper gives the design process of LNA, Mixer and RF switches detailedly.From the single MOSFET switch model, the insertion loss is deduced quantitatively, and the relationship between insertion loss and substrate resistance is given. Measurement results showed the insertion loss of 1.9dB, the reverse isolation of 27dB and the chip area of 100u*150u.As for the UWB LNA, the input match, noise figure and gain flatness are analysed. Across 3~5GHz, the measured power gain is 13.2dB with a gain flatness of±0.45dB. The noise figure is 3.2~5.5dB and the input P1d B is -11.7~-15.9dBm. The chip cover an area of 0.7mm2 and the power consumption is 17.2mW.Current injection and inductive shunt peaking techniques are adopted to design the UWB mixer. Also the noise and linearity of the mixer is discussed. Measurement results shows the power gain is -0.4~1.1dB across 10M~1GHz. The measured P1d B is -5~-8dBm with a power consumption of 9mW.