Font Size: a A A

Design And Implementation Of Multi Processors IP Core Of Webit System Based On FPGA

Posted on:2009-10-18Degree:MasterType:Thesis
Country:ChinaCandidate:J L WangFull Text:PDF
GTID:2178360308479838Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
With the development of technology, the physical capability of materials restricts the enhancing of clock frequency and integration density, which makes it hard to advance the processing capacity of single-processor. In order to design high-performance processor to satisfy users'requirement of computing capacity, researchers attach more attention to the single-chip multiprocessor CMP structure, which is a new structure to advance the processing capacity.In this paper, we design a multi-processor named Webit System Core based on the CMP structure. In order to validate the feasibility to enhance the processing capacity by CMP structure, we design and implement the Webit System processor, at last test the capability of the system. There are four processor cores integrated in the system. In order to improve the communication speed between the processors, a switch control module is designed among the processors. The interconnection topology of processors adapts binary fat tree structure. Each processor accesses to exterior memory by the shared bus. The system provides a segment register for every processor, and processors use the segment register subjoining an offset to calculate the address of exterior memory. The addressable space is 1MBytes. In order to reduce the delay brought by processors competing with others for using the bus to access exterior memory and raise the utilization of each processor, we provide a cache whose capacity is 1KBytes for each processor, and design the corresponding coherence cache replace strategy depending on the system's structural characteristic.In this paper, we describe the core of the Webit System processor using VHDL, download the integrated Webit System to XC3S500E, one kind of FPGA chip of Xilinx and test it. The design of Webit System's processor uses the 8051 IP core, cutting down the 8051 IP Core and adopting the interior processor's design. We run the RMX operating system on the Webit System. By testing, the processing ability of Webit System processor is about 2.15 times of MC8051 IP Core.The character of Webit System processor is multiprocessor parallel processing. Under the management of the operating system, each processor can perform multitask, and cooperate with others in high communication rate. The Webit System has a more powerful processing capacity comparing to the corresponding single processor. The design of Webit System processor is just a maiden attempt of CMP structure. The research work has great significance in the research of multi processor, and it provides some reference value for the integrated design of high-performance processor on a chip.
Keywords/Search Tags:Webit System, CMP, FPGA, IP Core, VHDL
PDF Full Text Request
Related items