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Study Of Wafer Bonding Technology And Nanowires Growth Technology In Compatible Heterogeneous Optoelectronic Integration

Posted on:2011-07-24Degree:MasterType:Thesis
Country:ChinaCandidate:W WangFull Text:PDF
GTID:2178360308462525Subject:Electromagnetic field and microwave technology
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In the 21st century, information technology will be integration of high-tech like microelectronics, optoelectronics and photonics technology which based on the information functional materials. The development of optical integration or optoelectronic integration technology, research on low-cost, high-performance optoelectronic information devices will become particularly important.Different material in optoelectronic integration has its own unique physical characteristics. It is necessary to develop heterogeneous optoelectronic integration, in order to comprehensive utilize different characteristics of various materials. There are two problems in heterogeneous optoelectronic integration:1. lattice mismatch,2. different coefficient of thermal expansion. In this paper, we address practice and research of key technology to solve those two problems -low-temperature wafer bonding technology, growth of nanowire technology, the main contents are as follows:1. In-depth study of the basic principles of bonding, low-temperature bonding method, in particular InP/Si, GaAs/Si bonding methods, and the main application of bonding technology.2.Thermal stress on the wafer bonding process were analyzed, obtained: lower annealing temperature (ie, low-temperature bonding) is the most effective way to reduce the thermal stress on bonding effects.3. Cooperative simple, non-toxic experiment of InP/ Si low temperature wafer bonding was successfully achieved by Boride treated wafer surface. Bonding interface with good morphology. Test IV curve shows bonding interface with good electrical properties. Thin SiO2 intermediate layers with thickness of about 21.56nm (Si/InP) at the bonding interface were detected by secondary ion mass spectroscopy(SIMS).Together with XPS test, confirmed the boric acid solution treated wafer surface dominated by P, O, As, B, Si these five elements through a combination of bridging oxygen (SiO2-B2O3-P2Ox), thus ensuring solid bonding strength at a low temperature.4. In-depth study of III-V family nanowire growth techniques, as well as the impact of different growth condition to nanowire grows.5. InP nanowires were successfully growed on the InP substrate through gas-liquid-solid (VLS) method, and various affects for different morphologies of InP nanowires were analized.
Keywords/Search Tags:low-temperature wafer bonding, GaAs/Si wafer bonding, growth of InP nanowire, morphology analyze, MOCVD
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