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Analysis Of Adaptive Filter Algorithms And Its FPGA High-speed Implementation

Posted on:2011-01-14Degree:MasterType:Thesis
Country:ChinaCandidate:J TangFull Text:PDF
GTID:2178360305993579Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Adaptive filter has been widely used in signal cancellation noise, system identification, channel equalization, signal prediction and so on. It can adjusts filter coefficients and always maintain the optimal filtering according to the measured signal characteristics to meet the premise of a certain algorithm automatically. Adaptive filtering algorithm and hardware implementation of signal processing has been a hot research field. The signal processing rate has higher and higher requirements as electronic systems become more powerful.Aiming at the status of adaptive filter generally implemented using DSP processor, a use of FPGA high-speed implementation methods was put forward. First of all,50Hz power interference and Gaussian white noise sine wave signal was used as the research object. The relationship of LMS (Least Mean Squares) adaptive algorithm's step size, order and adaptive filtering accuracy, convergence speed parameters was analyzed, studied deeply and simulated using spectrum analysis method on matlab2007b software. Then the best adaptive filter parameters for hardware implementation was obtained, That is filter order of about 32 bands, step size is about 0.05.Then, LMS coefficient updating automatically subsystem was built using Altera's DSP Builder tool.8-order LMS adaptive filter models was also built on the basis of the LMS coefficient updating automatically subsystem. Through the Modelsim simulation and QuartusII synthesis and Fitting, the high-speed LMS adaptive filter was implemented on EP2C240Q8N FPGA with the highest response frequency of 58.99MHz. Its performance is far superior to these implemented by DSP processor and its development efficient is much higher than with these using HDL underlying coding, and any order of the LMS adaptive filter can be easily expanded on this basis. At last, the core of the smallest experimental FPGA board using EP2C240Q8N was designed and manufactured. The FPGA board using two layers of cloth version technology has AS and JTAG two download model. With examples of hardware testing, the FPGA experimental board is stable and reliable, very suitable for hardware system development.
Keywords/Search Tags:adaptive filter, LMS algorithm, simulation, FPGA, Development Board
PDF Full Text Request
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