| Speaker verification is a technology to determine the true identity of the speaker. It already has extensive research and high recognition rate, but most of implementations are based on PC, and cost is too high, range of applications is relatively narrow. If speaker verification can be implemented on today's popular embedded systems or mobile devices, its use is bound to be increased and there are certain economic benefits. Owing to frequency of embedded systems and mobile devices is much lower than PC, How to ensure that speaker verification system can work in the low-frequency and has real-time response is the key to this study.This paper focuses on the portable speaker verification system based on SoPC technology and its implementation on FPGA. According to the system requirements of functions and resources, Altera's embedded hardware platform was selected. A custom component of voice capture which is consistent with Avalon bus interface standard was designed with hardware description language (HDL). And a voice database was established for the system; Analyzing the speaker verification algorithm's complexity, then the related algorithms are accelerated on hardware through using custom components and custom instructions.Especially when extracted the voiceprint features, Fast Fourier Transform (FFT) is used to calculate power spectrum, because of its large value, it requires that the hardware implementation of FFT has a high accuracy (up to three decimal places).This paper achieved FFT hardware acceleration with three methods, as the precision gradually increases, eventually the system requirements were satisfied, and the result of hardware acceleration was very obvious. A speaker identification system was completed on the selected platform, and system test results show that the design of speaker verification system is effective when working at low frequency, and certified results basically meet the real-time requirements. |
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