Design Of SOPC For Speaker Recognition Based On VQ Optimized By Codebooks Clustering Algorithm

Speaker Recognition Technology has the advantages of high accuracy, easy identification, low cost and non-contact recognition, and it could be widely applied in the identification field. Pattern recognition serves as an important component part of influencing the speaker recognition performance, and it has been the research focus of Speaker Recognition Technology. Wherein the model of Vector Quantization(VQ) Algorithm is designed simply and the system is fast and effective, it would be widely used in the fast speaker recognition system. With the advent of the mobile Internet era, Speaker Recognition Technology should recognize the speakers fastly and accurately, and could be portably integrated in the small mobile devices. The FPGA-based on-chip programmable logic system SOPC has the advantages of low power consumption, low cost, fast and easy integration, and could fully use the chip resource to realize the correlation algorithm. So the SOPC design of speaker recognition system has become an important trend.In order to achieve the design of SOPC for pattern recognition of speaker recognition, thesis analyzes the existing pattern recognition algorithms, on the condition that the recognition performance and the algorithm complexity are comprehensively considered, the VQ algorithm which is suitable for the design and implementation of FPGA is researched. In light of the problem that the amount of computation of the full search is large when the original algorithm is matching the recognizing, the Codebooks Clustering VQ Algorithm and the corresponding fast matching recognition algorithm are proposed. Then due to the amount of computation is large and the delay is long in the process of improving the algorithm, the acceleration design of hardware modules is executed. With the SOPC Builder and NIOS II IDE platform, the software and hardware design of speaker voice-print pattern recognition system is implemented, and the SOPC system of the speaker pattern recognition is achieved. It is important for the SOPC design of speaker recognition system.Thesis mainly includes the following aspects:1. The speaker voice-print feature pattern recognition algorithm is researched, and the VQ algorithm which is suitable for the design and implementation of FPGA is improved. In light of the problem that the amount of computation of the full search is large when the original algorithm is matching the recognizing, the Codebooks Clustering VQ Algorithm is proposed and the fast matching algorithm is designed. Experiments show that the improved algorithm achieves the 57.44% optimizing rate of the matching number in the premise of not influencing the recognition accuracy.2. According to the analysis of the overall process of the improved algorithm, in light of the steps that the amount of computation is lager and the delay is long in algorithm, the design of hardware modules based on FPGA are achieved. Mainly include the LBG algorithm acceleration module, calculating module of the distance between the codebooks, the representative codebook calculating module, the distance calculate module between the feature parameter and the codebook. And the simulation verifies the effectiveness of the design modules.3. The relevant acceleration modules are packaged into the IP core which is suitable for the SOPC design, and combines with the NIOS II handler to complete the hardware and software design of the SOPC system processor. Ultimately, the test verifies the accuracy, reliability and efficiency of the designed system in this paper.