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The Property Research And Structure Design Of MOSFET With Stack-gate

Posted on:2011-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:J ZhangFull Text:PDF
GTID:2178360305473028Subject:Microelectronics and Solid State Electronics
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As we know, computer and communication machine is a realization of the key social modernization and information, but the core foundations of its main products are micro. At present, MOS integrated circuit is the heart of the microelectronics industry. Since 1960s, the development of the rules of the integrated circuit follow the prediction, IC integration will increase 4 times every 3 years and feature sizes shrink-fold every 3 years, from one of founder of Intel whose name is Gordon E. Moore in 1965. In recent decades, it's necessary to shrink device feature sizes, improve the production process of machining accuracy and grow silicon area in order to further improve the performance of electronic integrated systems and reduce costs. Meanwhile, the cost performance of integrated circuits is increasing rapidly. In modern electronics, the MOS device is based on the technology of Complementary Metal Oxide-Semiconductor; the technology has become a mainstream semiconductor technology for its low power consumption and highly integrated features. It is estimated that the microelectronics industry will still be shrinking for the mainstream silicon CMOS process technology at least the first half of the 21st century.After further enhance the integration of integrated circuits, while the devices with feature sizes continue to shrink, the reduced size of the device caused by short channel effects and other physical problems has been the focus of researchers. The purpose of study is to reduce feature size on the adverse impact. One method is by introducing new materials, especially the improvement of gate material. Another method is by changing the structure of the device, designing a new structure of the device, re-evaluating the device performance and repeating laboratory tests. The new structure device modeling and simulation is mainly embodied in the device's own analysis and modeling of electrical parameters. This thesis is based on this objective, the main research design of new devices whose threshold voltage and current characteristic.Generally, electron enters the channel at a lower initial speed in traditional MOSFET, it gradually accelerates the process in leakage end movement and the drift velocity reaches the maximum in leakage end drain. Therefore, the speed of movement of electrons is fast at leakage end drain, but slower at the source endpoint, the speed of device is limited by lower velocity of electronic sources endpoint for its uneven field distribution. Carrier be greatly accelerated only in near leakage end drain of channel district. It is easy to inject hot carrier for small accelerating regional. At the same time, devices will also have DIBL effect and short channel effects in the case of low-leakage pressure. The electric field distribution is different between the design of stack-gate MOSFET channel and ordinary MOS. In the middle of channel, electric field distribution is uneven, because the impact of interface of the two gate mutation. The electric field has a peak in interface. Source end electronics show a larger average, while a more uniform electric field distribution under the peak acceleration in the electric field. Thus, the average speed increases of electronic increase mobility, his cut-off frequency, drive capacity and the transconductance gm. Furthermore, it's advantage to reduce the peak electric field, the short channel effects, hot carrier injection and increase breakdown voltage.It's observed that overlapping MOSFET gate threshold voltage change of apparent slow to single-gate MOSFET with the smaller channel by a large number of simulated. This article based on the phenomenon, the short-channel is inhibited by stack-gate MOSFET and variation theory. First, single-gate MOSFET threshold voltage modeling analysis, which given the channel length L associated with the threshold voltage analytic expression. Second, stack-gate MOSFET model is proved by using variation approach. It demonstrates the advantages by comparing stack-gate MOSFET with single-gate MOSFET from the theoretical point of view. At the same time, this advantage is also based on current characteristics and good channel electric field by the simulation. The most obvious difference is gate structure between stack-gate MOSFET and single-gate MOSFET. The design of this gate structure will inevitably lead to changes in gate capacitance. At one time, this paper also analyzed the gate capacitance and applied among other features.Stack-gate MOSFET is also a kind of voltage-controlled device, so the basic analysis of the current characteristics by still using the slowly changing channel approximation. Taking n channel MOSFET gate stack for example, first, it gives its current equation. Second, it's necessary to analysis its linear region, saturation, and sub threshold region. Third, it should consider the effect of piezoelectric field gate. Afterwards, the surface of the stack-gate MOSFET mobility was modified. Finally, a more complete stack-gate MOSFET current model is demonstrated.
Keywords/Search Tags:Stack-gate MOSFET, Voltage Threshold, Gate Capacitance, Current Characteristic
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