Research And Design Of Low Voltage And High Linearity Cmos Mixer

In recent years, demand for wireless communication system has been increased tremendously and it has motivated a strong interest towards the development of CMOS Radio Frequency Integrated Circuit (RFIC) at low-cost, low-power and high-performance. A RF front-end of a wireless communication system using CMOS technology is not only necessary but also feasible. CMOS RF front-end is made up of receiver and transmitter, as a very important part of receiver, the performance of mixer directly affects the performance of entire receiver front-end. And the research on low voltage and high linearity has gained increasing interesting.The paper briefly introduces the research status and significance of mixer. Then the basic theories of mixer are summarized systematically. A CMOS mixer is presented with a new circuit scheme to realize low voltage and high linearity simultaneously. The main works of this paper consist of following aspects:Firstly the paper summarize the progress and researches of CMOS mixer, in which most work focus on low voltage and high linearity aspects. And then Volterra series approach was given for the analysis of the linearity of mixer on a common-gate (CG) structure. The need for simultaneous cancellation is investigated for the shortcoming of the conventional derivative superposition (DS) method and modified DS method. Then a new modified DS method is proposed by a complementary PMOS transistor, in order to simultaneously cancel the second and third-order nonlinearities in common-gate transconductance stage of mixer. Finally a lower voltage and highly linear CG mixer is designed based on LC folded construction and modified DS scheme.The proposed circuits are simulated by Agilent's ADS2008 based on TSMC 0.18μm technology. The results show the supply voltage of 0.8V, the power consumption of 4.56mW, the conversion gain of 5.821dB, the noise figure of 7.878dB, the input P-1dB compression point of-4dBm and the IIP3 of 19.262dBm. Simulation shows that it is more excellent than recently published CMOS designs on the linearity and the voltage.