Algorithm And Architecture Co-Design Of Fast Predictive Diamond Motion Estimation

Video compression can reduce the redundant information of video, to solve the difficulty of video transmission channel bandwidth, and accelerate the speed of video real-time transmission. Motion estimation is an important part of video compression to reduce the redundancy information between video frames, with the fact that most of the contents between adjacent frames are same. Block matching algorithm based on pixels block for motion estimation, considering from computational complexity and coding efficiency. It has the good robustness for different signal with high compression rate, and it is simple and convenient for hardware implementation. The diamond search algorithm has the best performance compared with other fast block matching motion estimation algorithm and become a hot spot for the study of subsequent motion estimation algorithm. In this paper, we conducted the study of the classical fast block matching search algorithms and the improved algorithm of diamond search algorithm has been proposed. The new algorithm has the less search points with ensuring the search precision. The main contributions of this paper are as follows:1. We conducted the study on video compression, including the implement modules. Besides that, the working mechanism and structure of motion estimation have been introduced. 2. We did the expatiation for the classical block matching search algorithms, such as full search, three-step search, diamond search, etc. The advantages and disadvantages of them have been analyzed on the basis of their search pattern and strategy. The simulation and performance analysis of them have been did in the experimental part.3. The novel fast predictive diamond search (FPDS) algorithm with adaptive search mode has been proposed in this paper, based on the comprehensive analysis of the DS and improvement of search strategy and pattern. The static judgment, motion classification, early stop strategy have been combined with diamond search pattern to reduce the search points. In addition, the directional expanded square pattern and small octagonal search pattern have been used to decrease the computation to ensure search accuracy. The simulation result in the experimental part shows that the proposed FPDS motion estimation algorithm can reduce60%search points with similar image quality as DS algorithm.4. The FPGA architecture design and simulation have been done in this paper. The proposed hardware architecture for FPDS adopted resonable parallel design to improve the running speed with low hardware cost and power consumption. At last, the functional simulation has been done with Modelsim platform and we used the ISE9.1to integrate the architecture and analyze its hardware performance. The experimental result shows that the maximum clock frequency of hardware architecture can reach183M with the least hardware area and lowest power consumption compared to other motion estimation architectures.