Research On The Structure And Special Instruction-set Of A Reconfigurable Stream Cipher Processing System

Reconfigurable computing technology combines the merits of flexibility of general microprocessors and high-efficient hardware of ASICs. A reconfigurable cipher processing system can support multiple cryptographic algorithms which can process crypto algorithms with efficiency and flexibility and also improve the secureity of the cipher processing systems. The reconfigurable cipher processing system will be widely used in military and commerce fields.A reconfigurable stream cipher processing system is proposed on the basis of analyzation of the generating methods of stream ciphers and the special instruction-set of the system is designed combining with the characteristics of reconfigureable computing technology. The main work of this paper includes the following:1. Two kinds of stream ciphers, which are suitable for reconfigurable processing and widely used, are picked up after analyzing the generating methods of stream ciphers proposed by Ruppel. One is of FSR+NLF structure working on GF(2) and the other is of LFSR+NLF structure working on GF(2~w)(w=8, 16,32). Then, a reconfigurable stream cipher processing system is proposed in which the main parts are two reconfigurable processing units on the basis of analyzing the generating structure and processing flow of the stream ciphers mentione above. Reconfigurable stream cipher processing structureI and reconfigurable stream cipher processing structureII for the two units are designed and the reconfigureable units based on them can produce the above-mentioned ciphers respectively. The two architectures have the following characteristics: 32-bit coarse-grained; partial crossbar intercomnect topologies; loosely coupled with the main processor and performs the computations independently; static reconfiguration mode.2. A special instruction-set is designed for the reconfigurable stream cipher processing system. The instructions are divided by functions into configurating, initializing and controlling ones through analyzing frequently used operations, which are concretely depicted as: configure structure of FSR; configure NLF; configure the RU for confusion and diffusion; configure the connection; initialize; enable the configuration; enable to run; stop. The instruction formats in UI are designed and the machine encoding formats of the instructions are defined based on the chosen hardware architectures of each reconfigurable unit and interconnection.3. The working flow of the reconfigurable stream cipher processing system is described and two typical stream cryptographic algorithms—Achterabhn algorithm and SOBER-t32 algorithm are respectively mapped onto the two above-mentioned reconfigurable architectures. The programs of configuration and execution are written with the designed special instruction-set.4. The instructions are parsed with C language. The analyzation of the functions and performance of the reconfigurable stream cipher processing system and its special instruction-set indicated that they can ensure high flexibility for the two above-mentioned sorts of stream cryptographic algorithms and can achieve relatively high performance.