Digital Filter Design And Implementation Based On FPGA

With the development of electronic technology, the digital filter is widely used due to the favorable characteristic, and it provides an important function in DSP design. In engineering practice, real-time and flexible requirements for signal processing are required strictly. However, it is difficult for software and hardware techniques present to meet the demand for the two aspects. Along with the development of PLD device and EDA technology, digital filter is realized with FPGA, with both real-time and flexibility requirements satisfied. More and more electrical engineers use FPGA to implement digital filter. While hardware engineers need to rewrite code when filter parameter is changed. This leads to a large waste of design resource.This paper studies all kinds of algorithm of digital filter design and realizes which is based on FPGA. With the research over these algorithms, a filter code library realized by all kinds of algorithm is confirmed. Based on this code library, a software system which can created filter realization code automatically is developed, consequently, design waste that caused by parameter change is avoided and filter design period shrinks. The job of this paper includes followings:(1) Study the appliance of Distributed Arithmetic (DA) in design of digital filter (including FIR and IIR). Digital filters which is based on the distributed serial algorithm, distributed parallel algorithm, and method with chip-bring multipliers is realized. This paper also includes analysis and compare of the performance, features and the resource cost of the digital filters which is realized by different methods.(2)Design the digital filter by using Verilog hardware description language and top-down method. Besides, the design also utilizes FPGA apparatus and all kinds of algorithm (MAC, DA serial/parallel). The design carries on a detailed logic simulation for each module of the filter and then testifies the result, which approves the correctness of the design.(3) Establish Digital Filter RTL code Component Library. With the establishment of the component library, various digital filter realization methods are classified. And in each category, the codes are divided into several parts, so that the design of filter structure can be seen clearly, which lays foundations for the automatical generate system of filter REL code.(4) The design of filter RTL code automatically generates system. Digital filter is frequently used in the field of digital signal processing. But because the filter parameters and performance requirements varies a lot, the filters can not be reused. When the demand changes, it's necessary to redesign the filter. In this paper, MATLAB GUI design is used to integrate the filter design and the FPGA hardware implementation. Users can set the filter parameters and select FPGA chip on the software interface. Then the system calls the MATLAB filter design function and the FPGA resource document library, educes the parameters such as corresponding filter coefficients and chip consumption of resources. On the basis of these different filter coefficients, the system calls the RTL code component library to generate the filter that can be used in the practical design.