FPGA/DSP Image Co-processor Technology And Ethernet Data Transmission

With the continual development of machine vision technology, the research and exploiture for various machine have gained widely attention both in military and civil field. Especially, after the machine vision and Internet technology combined, the machine vision has been an important research subject due to its wide application future. The main content of this paper is that the image real-time preprocessing and video data real-time transmission from machine vision systems.The paper designed an embedded network interface basing on TI's digital media DSP DM642. The video data were transmitted to PC via ethernet realizing the long-distance supervision under the transmission protocol of TCP/IP. Basing on the DSP/BIOS, the NDK of TI was applied to the provided TCP/IP protocol stack finishing the network driver with suitable interface configuration, and building the network transmission software platform. To receive the data from the video terminal, the paper developed the video image real-time playing software by using Winsock on the end of PC and completed the communication from DSP to PC.This paper consists of design and implement of digital image algorithms such as median filter, image intensification, picture edge examination in standard hardware description language Verilog HDL according to FPGA. The utility of parallel algorithm was efficiently exploited in the design through improving algorithms and optimizing structures under reasonable using hardware resource. With pipeline optimization algorithm, the speed of image real-time processing module was hugely improved. In the design of median filter, the algorithm called fast median filter from the paper which saved a large number of FPGA resource and the speed of image real-time processing also was accelerated. The design of image intensification from the paper realizes the real-time processing of image intensification algorithms which reduced the use percentage for hardware resource and improved the treatment speed for image.Finally, the experiment verified the real-time image data transmission function for the embedded network interface and tested the transmission performance for network interface. The result indicated that the design of image processing algorithm based on FPGA not only achieved a favorable processed result with high frequency, but also realized a better performance on speed than using software and suit for real-time image processing.This thesis made a attempt with exploration for the design technology of network interface and image processing for machine vision systems and provided preliminary study for the machine vision systems based on DSP.