Research And Design Of Baseband Controller For Low-Power High Frequency Radio Frequency Identification Tag Chip

Radio Frequency Identification (RFID), as an automatic identification technology, is developed with the maturity of communication technology and large scale integrated circuits, and is widely used in many kinds of application fields. As RFID edge closer towards wide-spread deployment, a low-cost and low-power tag becomes a central concern, which is according to the application demands. The focus of this paper is to design such a baseband controller.Firstly, based on the study of power resource of CMOS digital IC, power estimation, various common low power methods and many power optimization strategies are presented in this thesis. Secondly, a novel architecture of the low-cost and low-power baseband controller is proposed on the basis of discussion on the power consumption of the tag chip's components, and its characteristics are analyzed. Then, for the design goal, ISO/IEC 15693 RFID protocol are carefully studied, and the key point techniques of sub-modules are presented, which lay on the baseband controller of 13.56 MHz tag. Finally, the baseband controller of a high frequency RFID tag chip is explored depending on the protocol. And the means of synthesis is developed, while the FPGA prototype verification platform is set up.The chip is fabricated in SMIC 0.35μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM. The result of both functional simulation and power analysis indicates baseband controller can work well.