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Study On Performance Evaluation Of Network Processor High-bandwidth Data Bus Interface

Posted on:2010-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:J ZhengFull Text:PDF
GTID:2178360275997800Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the technology of integrated circuit and data communication developing, Network processor which is a high performance processor developed in large flow rate and complex service. It is dedicated to enhance the capacity of network packet data and transfer information, in order to meet the demand for the bandwidth purpose. The data transmission quality of Network processor is affected by performance of external bus interface which connected to their network equipments.Although the function and purpose of the bus are more or less the same, the internal structure and the realization of the mechanism are various. This article tried to find an objective and reliable evaluation methods for Exchange bus, while improve program the deficiencies of existing system.The paper put forward that for correctly assess a bus interface we need pay attention to the affect by both Ethernet and network processor through study the characteristics of high-bandwidth bus interface. In accordance with this principle, select and integrate the traditional single assessment, we combine the Model-based and Simulation-based approach to assess the bus performance. That is, Model-based evaluation build Ethernet conflict and delay trend by CSMA/CD and Binary Exponential Back-off Algorithm, simulate the change of Ethernet from light to heavy load by M/m/1 Queuing and throughput model, establish the utilization fluctuation of Ethernet by medium utilization model. Simulation-based assessment analyze the data bus work under receive overflow, send overflow, Unbounded ideal transfer rate state, frame length from 64B to 1518B state. Result of bus interface dynamic trend performance parameters which are effective, in line with Ethernet model fluctuation range. These results illustrated the bus interface of a network processor for Ethernet meet delay, transfer rate, throughput, utilization and other requirements, it also shows that Model-based assessment and simulation-based assessment prove the feasibility and reliability by each other.
Keywords/Search Tags:Network Processor, Exchange Bus, Ethernet model, Performance Evaluation
PDF Full Text Request
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