Font Size: a A A

Processor modeling and evaluation techniques for early design stage performance comparison

Posted on:1997-04-15Degree:Ph.DType:Thesis
University:University of MichiganCandidate:Wellman, John-DavidFull Text:PDF
GTID:2468390014480160Subject:Computer Science
Abstract/Summary:
This thesis develops two techniques and a design space search hierarchy that can be used to examine a large space of processor designs early in the design cycle, before an expensive investment has been made on hardware design, allowing designers to select an initial processor design that will satisfy more of the processor's design goals, reducing the number and cost of the design iterations. They also allow the designers to investigate the impact of trade-offs in the processor design, better preparing the project for later changes required in order for the processor to meet its area, power, or other design constraints.; The first technique is the resource conflict methodology (RCM), a full execution trace driven simulation that allows specification of the processor organization, design parameters and even the instruction set architecture model, and performance is estimated as accurately as a traditional (cycle-by-cycle) simulator for the same processor model. The resource conflict methodology therefore provides the user the flexibility to examine a large number of different processor designs, but simulation time can be limiting because RCM is driven by a full execution trace.; The second technique, called reduced trace analysis (RTA), addresses the simulation time problem by reducing the redundant calculation done while generating a performance estimate. RTA analyzes the trace to develop a weighted control-flow graph representation of the execution of the workload, where each node represents a sequentially-executed code block and each weighted, directed link represents a number of transfers of control between the linked blocks during execution.; RTA uses a trace simulator to derive estimates for each code block and each interface between connected blocks, then weights and assembles these estimates to determine the full performance estimate. This method significantly reduces the simulation time for each processor model, and yet still produces estimates within a few percent of the RCM estimates. Thus, RTA allows the user to investigate a large number of designs much more quickly than full trace simulation methods.
Keywords/Search Tags:Processor, RTA, Trace, Performance, Large, Simulation, Model, Full
Related items