Implementation And Performance Test Of Synchronous Ethernet In Data Exchange System

With the development of information technology and the increasing of the access network equipment,the global IP resources become more and more insufficient.The data exchange equipment as an important network node in the network branch alleviates this problem.For the packet transport network(PTN),which is originally not required for synchronization,also has to been charged with the time transmission of the original time-division transmission network and the time synchronization of the network equipment under the promotion of the information packet drawing process.Based on the normal operation of the data exchange system,by recovering the clock frequency signal from packet data coming from the switch system and using Microsemi to release the high-precision analog phase-locked loop(APLL)plus digital phase-locked loop(DPLL)clock module,the function of master and slave synchronous Ethernet is achieved.In order to solve the special situation that the device clock source may be lost in slave mode,a high-precision clock source is added into the system,and the priority strategy of the system synchronization link clock is formulated according to the programmable DPLL.All access units in this network topology keep frequency synchronization.The hardware system supports IEEE 1588v2 synchronous clock function in theory and it gives the preliminary solution for clock synchronization,the medium independent interface(MII)which is the bridge between PHY layer and MAC layer is used to capture and hit the hardware timestamp program.For the synchronous Ethernet system performance test,the ITU publishes the standard of G.8262.The accuracy of recovery clock testing and the wander performance testing and jitter performance testing are performed.Successfully testing the performance of the synchronous Ethernet provides a solid foundation for subsequent synchronization between master and slave devices.