Design Of Differential Current Controlled Current Conveyors

The thesis mainly studies the principle, design and methods of differential current controlled current conveyors. Firstly, it introduces the development and character of the current-mode circuit, and compares current-mode circuit with voltage-mode circuit simply. Afterwards, the development and character of the basic models of current mode circuits-current conveyors are introduced. Then, a new fully differential current controlled current conveyor(FDCCCII) and a new current controlled fully balanced current conveyor(CFBCCII) are firstly proposed after reading a lot of papers about current conveyors and combining with the project supported by National Natural Science Foundation of China (No. 60676021). Then, two new current mode active filters are brought forward on the base of the proposed circuit models. At last, the CFBCCII and the relative filter circuits are simulated by Hspice in order to verify the reliability, then the layouts of all the circuits are designed with Cadence. At last, the chips are taped out successfully in Singapore with the plan of MPW offered by ICC. The main contents are as follows:(1) A new fully differential current controlled current conveyor is presented in this paper. The proposed circuit is well capable of eliminating the common mode (CM) signals because of the differential input and output configurations, and the port parasitic resistor is controllable with using the bipolar junction transistor (BJT) translinear loop configuration. The proposed circuit owns the advantages of high speed and low power energy because of the characters of the BJT and MOS devices, which is able to be realized by BiCMOS technology. At last, the circuit is simulated by Pspice with 0.5μm technology in order to verify the reliability.(2) A new current controlled fully balanced current conveyor is presented in this paper. The proposed circuit can eliminate the common mode (CM) signals very strongly with the differential input, strictly symmetrical and CMFB circuit configurations. The port resistor is controllable because of the using of the parallel MOS transistor configuration.Moreover,the circuit eliminates the rigor MOS size condition of traditional CCCII circuit, therefore it is easy to be realized .Othermore, it's also easy to be integrated for that there are only MOS devices in this circuit. At last, the circuit is simulated by Hspice in order to verify the reliability of the circuit, and the chip is taped out successfully with the Chartered 0.35μm technology with the plan of MPW offered by ICC.(3) Two new active filters are presented on the base of the above proposed circuits. A new differential active filter with the controllable Q and ? is presented based on the FDCCCII circuit,and the filter circuit is simulated by Pspice in order to verify the reliability of the circuit; Another new active filter composed of only one CFBCCII and two grounded capacitors with the controllable ? is also presented based on the CFBCCII circuit, which is easy to integrate because of the simple circuit configuration, and the circuit is simulated by Hspice in order to verify the reliability of the circuit.At last, the circuit is taped out successfully with Chartered 0.35μm technology.