The Design Of Embedded Face Identification System Based On FPGA

As the development of computer science and micro-electronics, technology of face identification has from the theory research in the lab become the real product and applied in many fields.SOPC(System on Programmable Chip) and Embed system is the most popular concept in the electronic domain .So the face identification system designed base on FPGA , is made up of Nios II soft-core processor and many user-defined logic components.Based on the analysis and consideration of many kinds of application, especially mass storage of face samples, and on the foundation of network technology, database technology, face identification technology and embedded system technology, face identification system adopts Client/Sever structure. In the meantime, through in-depth study and research various aspects of face identification arithmetic and theory, properly improve on and combine some face identify arithmetic to make the face identification system reliable and effective. At the same time, the embedded system uses custom-defined instructions and logic components instead of software algorithm for improving the speed. The paper includes the following parts:1. Through adopting Client/Sever structure, the face identification system consists of foreground and background connected by network.2. FPGA, multi-format SDTV video decoder , fast Ethernet controller chip and other schematics construct multi-function system which functions consists of video capture, video display, network connect, keys control ,and so on.3. Research the principle of face identification's pretreatment algorithm, feather extraction and matching algorithm. Through research, the algorithm of face sample training and feature extracting is 2DPCA improved on PCA, which is suit for designing in FPGA. In the phase of sample training, face identification adopts the pass Jacobi way for precision of systems and decreasing time. The face identification system adopts the combine of the shortest distance and k-most shortest distance to advance the performance of FRR and FAR.4. Pretreatment of face images include medial filter and the algorithm sampling from initial image to standard face image. The face identification system spends so much time to do it by software, that it adopts hardware of arithmetic to do it, which is also named user-defined logic component. And the face identification system integrates it into video capture in pipelining way. The system adopts user-defined instructions to do mass float opration. On the promise of system reliability, they speed up the system.Experimental results show that the proposed framework of the system is effective and feasible. FPGA-based face identification system has unique advantages in terms of speed, power consumption and scalability. This method has broad prospects for development.