Research And Design Of The Test Receiver Based On DTMB

With the GB of floor figure TV set and issued, with the promotion of relatedapplications development, related equipment products R&D and use. There willbe a large number of related equipment products in development and use. Basedon the background of the development of digital television, need a large numberof professional testing equipment investment. In the DTMB network constructionprocess, in order to fully assess the integrated DTMB network coverage, furtheroptimize the network of DTMB, and the DTMB network technology acceptance,engineering and technical personnel need specialized for DTMB performance testequipment or instrument as a necessary means of testing and test tools.The main content of this paper is completed with the research and design oftesting receiver of digital terrestrial television terrestrial digital TV transmissionof national standard GB20600-2006" digital television terrestrial broadcastingtransmission system frame structure, channel coding and modulation.Design using Altera ’s Cyclone series chip EP1C3T144C8as the platform ofdigital terrestrial television, introduced domestic and foreign research presentsituation and the prospect of development, elaborated the system designrequirements and design ideas, Analysis and design the ground digital televisiontest receiver hardware design, Proposed the overall hardware design of terrestrialdigital TV test receiver, complete RF front-end module, power measurementmodule, cache processing module, USB communication module design accordingto the RF signal flows. And based on the research of the digital terrestrialtelevision video transmission system, focuses on the analysis of testing receiversystem TS streaming real-time transmission of high-speed data cache, Design anDTMB high-speed data cache processing system implementations based on FPGA. scheme using SDRAM completed a large capacity asynchronous FIFOcache design, an effective solution to the DTMB high speed communicationneeds. System simulation from the module, the overall logic analyzer debugging,then to the board level debugging and PC terminal testing, fully verify thefunctionality of the system, completed the original design.