Font Size: a A A

The IP Core Design Of All Phase Digital Filter

Posted on:2009-07-13Degree:MasterType:Thesis
Country:ChinaCandidate:Z G LiuFull Text:PDF
GTID:2178360272985953Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
As a good integration of all phase philosophy and digital filtering, all phase digital filter (APDF) represents good characteristics, and eliminates the Gibbs effect. On the other hand, with the fast development of semiconductor technique, the times of SoC comes. The technique of IC design will have a great change, and more research on IP technique will be done in the future. Under this background, this paper studies the design of IP soft core to integrate APDF and the IP technique.This paper introduces the design process of windowed APDF in one-dimension in detail firstly, and then compares the strong and weak points of the three realization structures of APDF. Seeing that the cost and the calculation complication of time- domain equivalence realization is the least, this paper decides to design the time-domain equivalence realization of the separable low pass APDF in two-dimension.We analyze the design formula of APDF, based on the principle of balance and interchange between the area and the speed, and then find that APDF based on IDCT, DCT and DFT can be implemented in a same circuit structure. So the area of the module which produces the filter response and the module which implements IDFT/DCT/IDCT of the frequency response can be less. Besides, because the area of the multiplier is large, to reduce the area of the chip we decide to use four multipliers but not sixteen multipliers to realize the module of filtering when the speed can meet our needs. And to make the area less, the filtering process of the row and the line of the image is in the same multipliers. Finally, to ensure that the image data into the filter can be one by one continuously, we use two groups of shift registers.And then this paper realizes the IP soft core of APDF using hardware design language and introduces the main logic circuits of the main modules in detail. In the end, this paper proves that the design of the IP core is correct by simulating the IP core in emulator. At the same time, this paper finds that the precision of the filter response form the module should be improved, so this can be the next work in the future.
Keywords/Search Tags:IP core, all phase digital filter, hardware design language, simulation
PDF Full Text Request
Related items