Design And Research Of LCD Image Scaling Engine

Nowadays,LCD is superseding CRT Display and becoming the mainstream for its features of smaller volume, lighter weight and lower consumption. Researches on this new technology started relatively late in out country, so, it is realistically meaningful to investigate technologies related to it.The resolution of LCD display supported is fixed. But Image resolution video signals sent by different sources may be different.LCD image scaling engine is necessary in LCD display solution system, because it translates the input images, which have different resolution to the fixed resolution image, then displays on LCD Panel.Based on the research of LCD display system and analysis of function and architecture of LCD image scaling engine, this dissertation presents a front-end design of LCD image scaling engine chip and FPGA verification with TOP-Down design topology. Several Image interpolation algorithms are researched and analyzed, and finally choosing bicubic convolution interpolation algorithm to implement image scaling function.Horizontal and vertical scaling structure is based on look-up table. Seperate zooming structure in both of horizontal and vertical directions is used to improve reliability of data processing and reduce chip cost. Moreover, with limitation of algorithm, it is necessary for LCD image scaling engine to add picture enhancement module to improve the quality of output image. OSD module and I2C interface module are also described in this dissertation detaily.In this dissertation, the RTL code of LCD scaling engine is described by using Verilog HDL. Eventually built FPGA Verification Platform using xc2v1000-fg256-4 of Xilinx.The results from FPGA verification show that the front-end design of LCD scaling engine is expected to meet the performance requirements.