Research And Realization For Data Acquisition System In Multislices Spiral CT

DAS(data acquisition system) is one of the core technique in the CT machine,its mostly function is converting the little electric current signal from detector into digital signal by A/D converter, collecting and adding auxiliary information, and then giving the central controller and the corresponding image reconstruction processing system. CT data acquisition system as a front-end machine system for data acquisition and preprocessing, with the features of multitudinous channels, high sensitivity, fast slew rate, large dynamic range, therefore the accuracy of DAS directly impacts on the CT image quality, the speed of DAS directly impact on CT scanning speed, and the stability of DAS determine the stability of CT machine.The design of multislices spiral CT DAS is detailedly introduced in this paper,and the system hardware circuit,controlling procedure and the simulation of controlling procedure are designed. Concretely, signal modification circuit,A/D module,serial interface,dual RAM,FPGA interface,FIFO memory module,power supply module,controlling logic and the others are contained in this thesis.The design based on EDA technology, uses Altera's StratixII GX series FPGA, and VHDL, first introduces the function of every modules and their implementation, implements the entire acquisition system A/D converter chip DDC112 sequential control and PLX Co. PCI bus controller PCI9054 logic control; and then detailedly introduces how to implement every modules control of this system by FSM.The thesis uses the FPGA internal resources to complete the customization of FIFO (First In First Out) memory in the FPGA design, which makes the design structure of hardware board simplify, reduces the interference of hardware board, and facilitates the hardware debugging. Moreover, the development of the multislices spiral CT DAS is prospected in this thesis.By QUARTUS II 6.0 simulation, experimental results verify the design of the feasibility and rationality, achieves the anticipated results.This paper also provides many structure diagrams, simulation wave figures and some VHDL codes.