Research On FPGA Configuration Bitstream Security

The method based on FPGA was faster and less cost than traditional method that based on ASIC to implement the system design, and the security and protection of IP in the FPGA-based design had been attracted much attention. The technology how to protect IP core in SRAM-based FPGA design was discussed, and the security structure of FPGA that could protect the configuration bitstream effectively was designed in this thesis.Firstly, the FPGA system with one-configuration-bitstream was protected by the security structure. And the structure was embedded in a decryption mechanism, which was composed by decryption module and key memory module, comparing with general FPGA. Based on this security structure, the dynamic reconfiguration system with multi-configuration-bitstreams was further investigated. In view of the partial reconfiguration, dynamic reconfiguration and self-reconfiguration that supported by SRAM-based FPGA, more effective security structure of FPGA which could protect configuration bitstream of dynamic reconfiguration was made. The embedded microprocessor was used to control reconfiguration in the security structure, the FSM (finite state machine) was used to determine whether the current configuration bitstream was encrypted, and the IP core made by the security algorithm was used to generate the circuit of decryption. Then, the design of security structure was examined on Virtex-II Pro of Xilinx Company. The result showed that the FPGA system with SSRP (Security Self-Reconfiguration Platform) structure could effectively prevent the system from security risks of system and IP disclosure which was made by exposure of configuration bitstream.