Boundary-Scan Test Research Of Board Level And SOPC Design

With the development of large scale integration technology, especially the appearance of surface mount technology (SMT), the conventional testing way based on probes are no longer available. As design for testability technology, boundary scan technology inserts boundary scan cell (BSC) between core logic and pin. BSC acts as the virtual test probe that carries out the test stimulus and response, which improves the observability and controllability of digital system. However, non-boundary scan circuit board still exists, which brings difficulty to boundary scan test. At the same time, with the development of circuit system, test vector that needs generating and uploading becomes more and more. So it reduces the efficiency of boundary scan test.Boundary scan test based on board-level problem is studied and a solution is given. This paper conquers uploading problem of boundary scan test vector and makes use of SOPC (system on a programmable chip) technology to develop an original boundary scan test system platform. It provides better performance and improves the efficiency of boundary scan test.First of all, the study of boundary scan board-level test from board fault model, mathematical model and characteristic matrix aspects is made, which includes infrastructure integrity test, interconnect test and cluster test. Boundary scan board-level test solution is proposed, which optimized the testability of circuit board and test vector.Secondly, the boundary scan test physical basis, test instructions, boundary scan correlative test standards are analyzed and the scheme of an original boundary scan test system platform based on this solution is made.Thirdly, boundary scan controller based on SOPC is developed, using USB technology and virtual instrument thinking, which integrates JTAG protocol and the major of function module into system on a programmable chip. In order to realize JTAG protocol, IEEE1149.1 test bus controller IP core is developed.Lastly, in order to validate this boundary scan test system platform, boundary scan demo board is designed by the testability technology. At the same time, the working cycle of boundary scan test is analyzed. The application of demo illuminates that system can work normally, which can also test stuck-at faults, open faults and short faults on board.