A Research On Interface Circuits Of Open-Loop Acceleromenter

Accelerometer is major application area of MEMS technology. In this dissertation, we analyze the principle of open-loop capacitive hybrid integrated accelerometer. Schematic and layout have been designed with 0.5um DPDM mixed signal technology provided by CSMC.Open-loop capacitive accelerometer interface circuit, which consists of timing generator, biasing voltage/current sources, buffer with low input capacitor, preamplifier, CDS, sample-demodulator, post-amplifier and filter, has been designed with chopper stabilization technique. Every module is discussed from function to specification. At the same time the design methods and schematics of these modules is presented. We simulate the circuit with technology parameters provided by CSMC. The important specification is composed of 5V power supply, 40g full-scale range, 50mV/g sensitivity, 100μg/ Hz noise floor, and 2.5V static output voltage. Sensitivity and static output voltage is adjustable, so application area is broadened.Layout is designed according to design rule and some design technique. We emphasize some questions in layout design and present answers. Because of capacitor compensation for miniaturized structure and comparison between buffered accelerometer and accelerometer without buffer. We present three layouts. We must match pads of miniaturized structure with IC modules.The circuit with low-noise, low-power, simple-principle is integrated with miniaturized structure by MEMS center.