Design Of High Pecision Dection Circuit For Capacitive MEMS Accelerometer

MEMS(Micro-Electro-mechanical System)accelerometers are widely used in consumer electronics,intelligent driving,artificial guidance and other fields,making it the focus of today's research.Capacitive MEMS accelerometers dominate the MEMS accelerometer due to their simple structure,good matching with CMOS technology and good stability.The MEMS accelerometer is mainly composed of sensitive components and detection circuits,and the detection circuit is the core part of the realization of the MEMS accelerometer function.Therefore,it is very important to design a high-performance detection circuit.In this paper,the structure of various detection circuits is analyzed,and the correlation performance is compared.On this basis,the differential is selected as the basic structure of the detection circuit design,and the detection circuit system architecture is explained on the basis of the differential structure.Then,from the perspective of the detection circuit system design,each sub-module of the detection circuit is designed.In the design of the pre-circuit,the non-ideal effect of the switch and the noise reduction technology are first described.On this basis,the Correlated Double-Sampling(CDS)technique and Chopping technology(CHS)are combined in the pre-circuit to reduce the impact of noise on the detection accuracy.By analyzing the design index of the preamplifier and the noise of the preamplifier,a low noise operational amplifier with equivalent output noise of 18.1nV/Hz@300Hz is designed.In addition,this design uses a capacitive adaptive calibration technique in the pre-circuit sensing capacitor array to improve the effective voltage range of the detection output.In the design of the back-end circuit-Switched Capacitor Low-Pass Filter(SC_LPH),several different types of integrators and analog Low-Pass Filter(LPH)design indicators are analyzed.On this basis,the design of Switched-Capacitor Low-Pass Filter is realized.The designed Switched Capacitor Low-Pass Filter is then optimized.The optimized Filter index is: in-band attenuation is 5.31 mdB@300 Hz,cut-off frequency is about 8.18 kHz,stop-band attenuation is about-41.47 dB@100 kHz,and output noise is 44.8 nV/Hz@300 Hz.Finally,the detection circuit is simulated based on CMOS technology.Under the 5V power supply,the combination of Correlated Double Sampling technology and Chopping Technology reduces the output noise of the pre-circuit from 209.2nV/?Hz@30kHz to 55.4nV/?Hz@30kHz.Capacitance adaptive calibration range is ±80fF with calibration accuracy of ±5fF.The output noise of the detection circuit is 1.317?V in the range of 0.01~300Hz,the linear output voltage range is higher than ±3V,the detection accuracy is slightly higher than 74nV/?Hz@300Hz,and the detection dynamic range is higher than 130 dB.