Research And Design Of A MEMS Accelerometer Readout Circuit

MEMS accelerometer is an inertial device used to measure the change of micro acceleration.It is a key technology with small size,high reliability,intelligence and high integration.It is widely used in the Internet of things,electronic machinery,industrial production,aerospace and other areas.In view of the requirement of low noise,high precision and wide output range,it is necessary to further improve the performance of the MEMS acceleration sensor.Considering the small change in the detection capacitance,the read-out circuit is very high.This paper studies the readout circuit of the MEMS micro acceleration sensor in this paper.First,based on the structure and characteristics of the mechanical part of the acceleration sensor,the equivalent capacitance model is set up,the possibility of the whole simulation of the sensor and interface circuit is realized,and the process of the change from the acceleration to the capacitance is analyzed in detail.After analyzing and studying the readout methods of different capacitive sensors,after comparing the advantages and disadvantages of various readout methods,the full differential switch capacitance detection method is selected as the optimal readout structure.And the main non ideal factors existing in the detection method are analyzed in detail,and the corresponding solutions are given.Then,a design for MEMS capacitive accelerometer readout circuit of fully differential switched capacitor charge variable gain amplifying circuit.In order to reduce the amplifier gain,CO op amp input DC offset voltage and low frequency noise effects,with correlated double sampling(CDS)circuit switched capacitor gain function,this paper makes a detailed analysis of the switched capacitor type detection circuit and differential mode and common mode noise characteristics.In order to achieve the system's accuracy and output range,by using a fully differential folded cascode operational amplifier,and the AC characteristics of the amplifier,frequency characteristic and noise are analyzed in detail.At the same time,by increasing the switched capacitor common mode feedback circuit to improve the stability and reduce the power consumption of the operational amplifier readout circuit.Then,the design of clock module excellent process stability,so as to realize the efficient control timing switch,closed.At the same time,research and design of reference module,and through the simulation under the condition of different process corners.Finally,using DongBu HiTek 0.18?m CMOS process,the main module and the whole circuit is simulated by Spectre software under 5.0V power supply,the verification results show that in typical corner,Op Amp open loop DC gain reaches 72.05 dB,unit gain bandwidth of 4.57 MHz,phase margin of 85.5 degrees,the equivalent input The noise of 4.41nV/ root Hz,variable gain switch capacitance detection circuit four stalls output differential voltage of the theoretical value and measured the error is less than 0.9%,the temperature coefficient of the base module maintained at 22ppm/ DEG C,after power into the steady state time is less than 1.5?s.Simulation of differential output voltage swing 2.94 V,simulation of differential output signal-to-noise ratio 21 dB,meet the design requirements.Finally,0.18?m based on 5.0V CMOS technology on the whole circuit layout design.