The Research And Implement Of Control Center In Video Signal Processing Chip

Nowadays, Video Signal Processing Chip is the hot and focuses research in the communication domain. As one of the core chips in DTV, it has a huge commercial value. The project is to design a new type and multi-function Video Signal Processing chip, together with a re-configurable SOC platform. Finally, the designed chip carries out the functions of de-interlacing, frame rate conversion, scaling and many image enhancement processes.In this paper, it introduces the system structure and the functions of modules briefly. Then, the design of control center is discussed detailed. Many of them are described roundly, such as the design partition, the sub-module design and functional simulation. Control center is the important part in Video Signal Processing Chip. It supports accurate logic control and timing signals, together with the converts of different work motions. The chip can detect the video type and serve standard timing for display.This paper also introduces a method to design a random clock error test bench in verilog. It improves functions afforded by verilog to create a set of approximate random vectors. Then, it simulates the real timing of the input signals of the module.The simulation report indicates that the method mentioned above can verify the affection availably, which is caused by the clock jitter and the random phase skew between signals are discusses. After functional simulation and hardware test on the FPGA demonstration board, it is sure that the control center can afford the correct logic control and can achieve the low power consumption. For a certainty, the chip suffices the demands of the video format converting.