The Research Of Data Acquisition And Data Compression Technology Based On Underwater Dynamic Parameters

In order to satisfy design request of some test experiments, important high speed signalneeded to be recorded .Data transformation and replay are also needed. In this paper, suchhigh speed acquisition recording device based on dynamic parameter test under water isresearched.There are mostly two aspects.First, according to the analysis in the course of underwater blast, combines with someaspects like actual test characteristics, requirement of test environment and design andimplement of hardware circuit, the suitable sampling frequency and sampling strategy andmethod is attained, the project of system design and system constitute is put forward, therationality of system structure is analyzed, hardware acquisition circuit based on CPLD isdesigned and manufactured. The system is different from other test instrument on blastunderwater before. It is superior in higher sampling frequency, higher quantity of test data,higher precision. However, with the improvement on quantity of data processed, it is necessityto aggravate the weight on data storage and data transform and descend the efficiency ofwhole system. How to resolve the problem becomes the core of the thesis.Thereby, accordingto the special restriction of speed and storage capability in the course of data transformation,data compression which can improve the speed of data transform and cut short the datacapacity is put forward. It descends the weight and improves the efficiency of system. It is theother research aspect of the emphases.Finally, bases on the theory of data compression, combines with many aspects such as therequest of test system, the hard degree of the implement of hardware circuit, the compare ofperformance with different compress arithmetic on different test data etc., LZW compress dictionary which adapted to do real data compress is gotten. The application and feasibility oflossless data compress is discussed aimed at the characteristic of data compress. Hardwarereal lossless compress circuit based on FPGA is designed and realized, the experiment resultsshow that compress speed achieves 4Mbyte/s, it satisfies the request of general test system.The highest compress ratio reaches 26.7%, at the same time, transfer speed is 4 times of theoriginal, test hours saves 75%.